In a conventional method of producing a flip-chip light emitting diode element, depositing a plurality of epitaxy layers on a sapphire growing substrate to produce an epitaxy wafer. On the epitaxy wafer, a plurality of light emitting diode elements are produced. The epitaxy wafer is cut to produce an element die. Flip-chip connects the element die to a fixing plate. The flip-chip connecting comprises fixing the element die at the fixing plate by connecting at least one electrode of the element die to at least one pad of the fixing plate.
Now there is a film light emitting diode element to replace flip-chip light emitting diode element, and in comparison to the flip-chip light emitting diode element, film GaN light emitting diode element has advantages of a low heat resistance, uniform current in n-type layer and p-type layer, and low cost. For the film light emitting diode element, the epitaxy wafer is directly bonded to a conductive carrier substrate. Then decomposing GaN with the use of excimer laser, and by so removes sapphire substrate and keeping the active region.
The above-described method of removing sapphire substrate is called the laser lift-off, which is disclosed in U.S. Pat. Nos. 6,455,340, 7,001,824 and 7,015,117. At present, the laser lift-off is the only applied method of film GaN light emitting diode element, but the laser lift-off is incompatible with the conventional process. Therefore, the method has disadvantages of expensive equipments and laser causing processing damages.
If the laser lift-off is replaced by conventional chemical mechanical polishing (CMP) technology, in comparison to the laser lift-off the technology does not require laser equipments and the usage of laser lift-off technology. It can achieve low costs and easy application. However, when applying the conventional CMP technology, if a plane to be polished is too large, location variables of two sides and center of the plane will be too large. Therefore, the required standard of flat plane during mass production of semiconductor devices cannot be achieved, which will lower the yield of the semiconductor device production. Thus, the present invention provides a method of super flat chemical mechanical polishing technology. The method overcomes the problem of large location variables of two sides and center of the plane from the conventional CMP, and provides advantages of low costs, easy application and better yield.